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fn3166 rev.4.00 page 1 of 18 jan 7, 2004 fn3166 rev.4.00 jan 7, 2004 icm7216b, icm7216d 8-digit, multi-function, frequency counters/timers datasheet the icm7216b is a fully integrated timer counters with led display drivers. they combine a high frequency oscillator, a decade timebase counter, an 8-decade data counter and latches, a 7-segment decoder, digit multiplexers and 8- segment and 8-digit drivers w hich directly drive large multiplexed led displays. t he counter inputs have a maximum frequency of 10mhz in frequency and unit counter modes and 2mhz in the other modes. both inputs are digital inputs. in many applications, amplification and level shifting will be required to obtain prop er digital signals for these inputs. the icm7216b can function as a frequency counter, period counter, frequency ratio (f a /f b ) counter, time interval counter or as a totalizing counter. the counter uses either a 10mhz or 1mhz quartz crystal timebase. for period and time interval, the 10mhz timebase gives a 0.1 ? s resolution. in period average and time interval average, the resolution can be in the nanosecond range. in the frequency mode, the user can select accumulation ti mes of 0.01s, 0.1s, 1s and 10s. with a 10s accumulation time, the frequency can be displayed to a resolution of 0.1hz in the least significant digit. there is 0.2s between measurements in all ranges. the icm7216d functions as a frequency counter only, as described above. all versions of the icm7216 incorporate leading zero blanking. frequency is displayed in khz. in the icm7216b, time is disp layed in ? s. the display is m ultiplexed at 500hz with a 12.2% duty cycle for e ach digit. the icm7216b and icm7216d are designed for common cathode displays with typical peak segment currents of 12ma. i n the display off mode, both digit and segmen t drivers are turned off, enabling the display to be used for other functions. features, all versions ? functions as a frequency counter (dc to 10mhz) ? four internal gate times: 0. 01s, 0.1s, 1s, 10s in frequency counter mode ? directly drives digits and s egments of large multiplexed led displays (common anode and common cathode versions) ? single nominal 5v supply required ? highly stable oscillator, uses 1mhz or 10mhz crystal ? internally generated decimal p oints, interdigit blanking, leading zero blanking an d overflow indication ? display off mode turns off dis play and puts chip into low power mode ? hold and reset inputs for additional flexibility features, icm7216b ? functions also as a period counter, unit counter, frequency ratio counter or time interval counter ? 1 cycle, 10 cycles , 100 cycles , 1000 cycles in period, frequency ratio and time interval modes ? measures period from 0.5 ? s to 10s features, icm7216d ? decimal point and leading zero banking may be externally selected part number information part number temp. range ( o c) package pkg. no. icm7216blpl -25 to 85 28 ld pdip e28.6 ICM7216DLPL -25 to 85 28 ld pdip e28.6 obsolete product no recommended replacement contact our technical support center at www.intersil.com/tsc
icm7216b, icm7216d fn3166 rev.4.00 page 2 of 18 jan 7, 2004 pinouts icm7216b (pdip) common cathode top view icm7216d (pdip) common cathode top view control input input b function input digit 1 output digit 3 output digit 2 output digit 4 output v ss digit 5 output digit 6 output digit 7 output digit 8 output reset input range input input a osc output osc input ext osc input decimal point output seg e output seg d output v dd seg b output seg c output seg f output hold input seg g output seg a output 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 control input measurement in progress digit 1 output digit 3 output digit 2 output digit 4 output v ss digit 5 output digit 6 output digit 7 output digit 8 output reset input ex. decimal point input range input input a osc output osc input ext osc input decimal point output seg e output seg d output v dd seg b output seg c output seg f output hold input seg g output seg a output 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14
icm7216b, icm7216d fn3166 rev.4.00 page 3 of 18 jan 7, 2004 functional block diagram notes: 1. function input and input b available on icm7216b only. 2. ext dp input and measurement in progress output available on icm7216d only. store and reset logic reference range select digit decoder osc ? 10 4 or ? 10 5 range control dp decoder segment input input fn main drivers counter ? 10 3 logic logic ff control logic control logic control logic data latches and output mux main ? 10 3 counter select control logic logic driver logic ext osc input osc input osc output reset input input a function input (note 1) d cl en cl overflow store 100hz q hold input input b (note 1) measurement in progress output (note 2) segment outputs ext dp input (note 2) control input range input digit outputs (8) (8) 38 8 5 6 47 8 6 44444444
icm7216b, icm7216d fn3166 rev.4.00 page 4 of 18 jan 7, 2004 absolute maximum ratings thermal information maximum supply voltage (v dd - v ss ) . . . . . . . . . . . . . . . . . . 6.5v maximum digit output current . . . . . . . . . . . . . . . . . . . . . . . 400ma maximum segment output current. . . . . . . . . . . . . . . . . . . . . 60ma voltage on any input or output terminal (note 3) . . . . . . . . . . . (v dd +0.3v) to (v ss -0.3v) operating conditions temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . -25 o c to 85 o c thermal resistance (typical, note 4) ? ja ( o c/w) ? jc ( o c/w) pdip package . . . . . . . . . . . . . . . . . . . 55 n/a maximum junction temperature pdip package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 o c maximum storage temperature range . . . . . . . . . . -65 o c to 150 o c maximum lead temperature (soldering 10s) . . . . . . . . . . . . 300 o c caution: stresses above those listed in ?a bsolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other condi tions above those indicated in the operational sections of this specification is not implied. notes: 3. the icm7216 may be triggered into a destructive latchup mode if either input signals are applied before the power supply is applied or if input or outputs are forced to voltages exceeding v dd to v ss by more than 0.3v. 4. ? ja is measured with the component mounted on an evaluation pc boa rd in free air. electrical specifications v dd = 5.0v, v ss = 0v, t a = 25 o c, unless otherwise specified parameter test conditions min typ max units icm7216b operating supply current, i dd display off, unused inputs to v ss -25ma supply voltage range (v dd -v ss ), v supply input a, input b frequency at f max 4.75 - 6.0 v maximum frequency input a, pin 28, f a(max) figure 6, function = frequency, ratio, unit counter 10 - - mhz function = period, time interval 2.5 - - mhz maximum frequency input b, pin 2, f b(max) figure 7 2.5 - - mhz minimum separation input a to input b time interval function figure 1 250 - - ns maximum oscillator frequenc y and external oscillator frequency, f osc 10 - - mhz minimum external oscillator frequency, f osc - - 100 khz oscillator tr ansconductance, g m v dd = 4.75v, t a = 85c 2000 - - ? s multiplex frequency, f mux f osc = 10mhz - 500 - hz time between measurements f osc = 10mhz - 200 - ms input voltages: pins 2, 13, 25, 27, 28 input low voltage, v inl --1.0v input high voltage, v lnh 3.5 - - v input resistance to v dd pins 13, 24, r in v in = v dd -1.0v 100 400 - k ? input leakage pins 27, 28, 2, i ilk --20 ? a input range of change, dv ln /dt supplies well bypassed - 15 - mv/ ? s digit driver: pins 4, 5, 6, 7, 9, 10, 11, 12 low output current, i ol v out = v ss +1.3v 50 75 - ma high output current, i oh v out = v dd -2.5v - -100 - ? a segment driver: pins 15, 16, 17, 19, 20, 21, 22, 23 high output current, i oh v out = v dd -2.0v -10 - - ma leakage current, i slk v out = v dd -2.5v - - 10 ? a multiplex inputs: pins 1, 3, 14
icm7216b, icm7216d fn3166 rev.4.00 page 5 of 18 jan 7, 2004 input low voltage, v inl --v dd - 2.0 v input high voltage, v lnh v dd - 0.8 --v input resistance to v dd , r in v ln = v dd -2.5v 100 360 - k ? icm7216d operating supply current, i dd display off, unused inputs to v ss -25ma supply voltage range (v dd -v ss ), v supply input a frequency at f max 4.75 - 6.0 v maximum frequency input a, pin 28, f a(max) figure 6 10 - - mhz maximum oscillator frequenc y and external oscillator frequency, f osc 10 - - mhz minimum external oscillator frequency, f osc - - 100 khz oscillator tr ansconductance, g m v dd = 4.75v, t a = 85c 2000 - - ? s multiplex frequency, f mux f osc = 10mhz - 500 - hz time between measurements f osc = 10mhz - 200 - ms input voltages: pins 12, 27, 28 input low voltage, v inl --1.0v input high voltage, v inh 3.5 - - v input resistance to v dd, pins 12, 24, r in v in = v dd -1.0v 100 400 - k ? input leakage, pins 27, 28, i ilk --20 ? a output current, pin 2, i ol v ol = +0.4v 0.36 - - ma output current, pin 2, i oh v oh = v dd -0.8v 265 - - ? a input rate of change, dv ln /dt supplies well bypassed - 15 - mv/ ? s digit driver: pins 3, 4, 5, 6, 8, 9, 10, 11 low output current, i ol v out = +1.3v 50 75 - ma high output current, i oh v out = v dd -2.5v - 100 - ? a segment driver: pins 15, 16, 17, 19, 20, 21, 22, 23 high output current, i oh v out = v dd -2.0v 10 15 ma leakage current, i slk v out = v dd -2.5v - - 10 ? a multiplex inputs: pins 1, 13, 14 input low voltage, v lnl --v dd - 2.0 v input high voltage, v inh v dd - 0.8 --v input resistance to v dd , r ln v in = v dd -1.0v 100 360 - k ? electrical specifications v dd = 5.0v, v ss = 0v, t a = 25 o c, unless otherwise specified (continued) parameter test conditions min typ max units
icm7216b, icm7216d fn3166 rev.4.00 page 6 of 18 jan 7, 2004 timing diagram measurement in progress (internal on 7216b) 30ms to 40ms internal store internal reset input a input b priming edges priming function: time interval update 190ms to 200ms 40ms 60ms 40ms measurement interval 250ns min measured interval (first) measured interval (last) update note: 5. if range is set to 1 event, firs t and last measured interval will coincide. figure 1. waveforms for time inte rval measurement (others are si milar, but without priming phase) figure 2. f a (max), f b (max) as a function of supply figure 3. typical i seg vs v dd -v out f a (max) frequency unit counter, frequency ratio modes f a (max) f b (max) period, time interval modes t a = 25 o c v dd -v ss (v) frequency (mhz) 20 15 10 5 0 34 5 6 85 o c -20 o c 4.5 ? v dd ? 6v 30 20 10 0 0 123 v dd -v out (v) i seg (ma) 25 o c
icm7216b, icm7216d fn3166 rev.4.00 page 7 of 18 jan 7, 2004 description inputs a and b inputs a and b are digital inputs with a typical switching threshold of 2v at v dd = 5v. for optimum performance the peak-to-peak input signal should be at least 50% of the supply voltage and centered about the switching voltage. when these inputs are being driven from ttl logic, it is desirable to use a pullup resistor. the circuit counts high to low transitions at both inputs. (input b is available only on lcm7216b). note that the amplitude of the input should not exceed the device supply (above the v dd and below the v ss ) by more than 0.3v, otherwise the device may be damaged. multiplexed inputs the function, range, control and external decimal point inputs are time multiplexed to select the function desired. this is a chieved by connecting the appropriate digit driver outpu t to the inputs. the function, range and control inputs must be stable during the last half of each digit output, (typically 125 ? s). the multiplexed inputs are active low for the common c athode lcm7216b and lcm7216d. noise on the multiplex inputs can cause improper operation. this is particularly true when the unit counter mode of operation is selected, since c hanges in voltage on the digit drivers can be capacit ively coupled throug h the led diodes to the multiplex inputs. for maximum noise immunity, a 10k ? resistor should be placed in ser ies with the multiplexed inputs as shown in the application circuits. table 1 shows the functions sel ected by each digit for these inputs. . figure 4. typical i digit vs v out figure 5. typical i digit vs v out typical performance curves (continued) 85 o c -20 o c v dd = 5v 200 150 100 0 0 123 v out (v) i digit (ma) 25 o c 50 v dd = 5.5v 200 50 100 0 01 2 3 v out (v) i digit (ma) 50 t a = 25 o c v dd = 4.5v v dd = 5v table 1. multiplexed input functions function digit function input (pin 3, lcm7216b only) frequency d1 period d8 frequency ratio d2 time interval d5 unit counter d4 oscillator frequency d3 range input, pin 14 0.01s/1 cycle d1 0.1s/10 cycles d2 1s/100 cycles d3 10s/1k cycles d4 control input, pin 1 display off d4 and hold display test d8 1mhz select d2 external oscillator enable d1 external decimal point enable d3 external dp input (pin 13, icm7216d only) decimal point is output for same digit that is connected to this input.
icm7216b, icm7216d fn3166 rev.4.00 page 8 of 18 jan 7, 2004 9. function input the six functions that can be selected are: frequency, period, time interval, unit counter, frequency ratio and oscillator frequency. this input is available on the lcm7216b only. the implementation of different functions is done by routing th e different signals to two count ers, called main counter and reference counter. a simplifi ed block diagram of the device for functions realization is shown in figure 8. table 2 shows which signals will be routed to ea ch counter in different cases . the output of the main counter i s the information which goes to the display. the reference co unter divides its input by 1, 10, 100 and 1000. one of the se outputs will be selected through the range selector and drive the enable input of the main counter. this means that the reference counter, along with its associated blocks, direc ts the main counter to begin counting and determines the leng th of the coun ting period. note that figure 8 does not s how the complete functional diagram (see the functional blo ck diagram). after the end of each counting period , the output of the ma in counter will be latched and displayed, then the counter will be reset and a new measurement cycle will begin. any change in the function input will stop the present meas urement without updating the display and then initiate a new measurement. this prevents an erroneous first reading afte r the function input is changed. in all cases, the 1-0 t ransitions are counted or timed . input a 4.5v 0.5v 50ns min t r = t f = 10ns counted transitions 50ns min figure 6. waveform for guaranteed minimum f a (max) function = frequency, frequency ratio, unit counter input a or input b 4.5v 0.5v measured interval 250ns min t r = t f = 10s 250ns min figure 7. waveform for guaranteed minimum f b (max) and f a (max) for function = period and time interval internal control 100hz input a input b input selector internal or external oscillator input a enable clock main counter range selector ? 1 ? 10 ? 100 ? 1000 internal control internal control clock internal control input selector reference counter figure 8. simplified block diagram of functions implementation table 2. 7216b input routing function main counter reference counter frequency (f a ) input a 100hz (oscillator ?? 10 5 or 10 4 ) period (t a ) oscillator input a ratio (f a /f b ) input a input b time interval (a ? b) oscillator input a input b unit counter (count a) input a not applicable osc. freq. (f osc ) oscillator 100hz (oscillator ?? 10 5 or 10 4 ) table 2. 7216b input routing (continued) function main counter reference counter
icm7216b, icm7216d fn3166 rev.4.00 page 9 of 18 jan 7, 2004 frequency - in this mode input a i s counted by the main counter for a precise period of time. this time is determined b y the time base oscillator and the selected range. for the 10mhz (or 1mhz) time base, the resol utions are 100hz, 10hz, 1hz and 0.1hz. the decimal point on the display is set for khz reading. period - in this mode, the timebase oscillator is counted by the main counter for the duration of 1, 10, 100 o r 1000 (range selected) periods of the signal a t input a. a 10mhz timebase gives resolutions of 0.1 ? s to 0.0001 ? s for 1000 periods averaging. note that the maximum input f requency for period measurement is 2.5mhz. frequency ratio - in this mode, the in put a is counted by the main counter for the duration of 1, 10, 100 o r 1000 (range selected) periods of the signal a t input b. the frequency at input a should be higher than input b for meaningful result. the result in this case is unitless and its resolution can go u p to three digits after decimal point. time interval - in this mode, the timebas e oscillator is counted by the main counter for the durat ion of a 1-0 transition of inp ut a until a 1-0 transition of input b. this means input a starts th e counting and input b stops it. if other ranges, except 0.01s/1 cycle are selected the sequenc e of input a and b transitions must happen 10, 100 or 1000 time s until the display becomes updated; note this when measuring long time intervals to give enough time for measurement completion. the resolution in this mode is the same as for period measurement. see the time interval measurement section also. unit counter - in this mode, the main counter is always enabled. the input a is count ed by the main counter and displayed continuously. oscillator frequency - in this mode, th e device makes a frequency measurement on its ti mebase. this is a self test mode for device functionality c heck. for 10mhz timebase the display will show 10000.0, 100 00.00, 10000.000 and overflow in different ranges. range input the range input selects whet her the measurement period is made for 1, 10, 100 or 10 00 counts of the reference counter. as it is shown in table 1, this gives different counti ng windows for frequency measurem ent and various cycles for other modes of measurement. in all functional modes except u nit counter, any change in the range input will stop the pre sent measurement without updating the display and then i nitiate a new measurement. this prevents an erroneous f irst reading after the range input is changed. control input unlike the other multiplexed inputs, to which only one of the digit outputs can be connected at a time, this input can be tie d to different digit lines to sele ct combination of controls. in this case, isolation diodes must be used in digit lines to avoid crosstalk between them (see fi gure 14). the direction of diodes depends on the device version, common anode or common cathode. for maximum n oise immunity at this input, in addition to the 10k resistor which was mentioned before, a 39pf to 100pf capacitor should also be placed between this input and the v dd or v ss (see figure 14). display off - to disable the display drivers, it is necessary to tie the d4 line to the control input and have the hold input at v dd . while in display off mode , the segments and digit drivers are all off, leaving the display lines floating, so the display can be shared with ot her devices. in this m ode, the oscillator continues to run with a typical supply current o f 1.5ma with a 10mhz crystal, but no measurem ents are made and multiplexed inputs are inactive. a new meas urement cycle will be initiated when the hold input is switched to v ss . display test - display will turn on with all the digits showing 8s and all decimal points on. the display will be blanked if displ ay off is selected at the same time. 1mhz select - the 1mhz select mode allows use of a 1mhz crystal with the same digit mul tiplex rate and time between measurement as with a 10mhz crystal. this is done by dividing the oscillator frequency by 10 4 rather than 10 5 . the decimal point is also shifted one digit to the right in period and time interval, since the least si gnificant digit will be in ? s increment rather than 0.1 ? s increment. external oscillator enable - in this mode, the signal at ext osc input is used as a timebase instead of the on-board crystal oscillator ( built around the osc input, osc output inputs). this input can be used for an external stable temperature compensated crystal oscillator or for special measurements with any external source. the on-board crystal oscillator continues to work w hen the external oscillator is selected. this is necessary to avoid hang-up problems, and has no effect on the chip's functional operation. if the on-boa rd oscillator frequency is less th an 1mhz or only the external oscillator is used, the osc input must be connected to the ext osc input providing the timebase has enough voltage swing for osc input (see electrical specifications ). if the external timebase is ttl level a pullup resistor must be used for osc input. the other way is to put a 22m ? resistor between osc input and osc output and capacitively couple the ext osc input to o sc input. this will bias the osc input at its threshold and the drive voltage will need to be only 2v p-p . the external timebase frequency must be greater than 100khz or the chip will reset itself to enable the on-board oscillator. external decimal point enable - in this mode, the ex dp input is enabled (lcm7216d on ly). a decimal point will be displayed for the digit that its output line is c onnected to th is input (ex dp input). digit 8 should not be used since it will override the overflow output. leading zero blanking is effectiv e for the digits to the left o f selected decimal point.
icm7216b, icm7216d fn3166 rev.4.00 page 10 of 18 jan 7, 2004 hold input except in the unit counter mode , when the hold input is at v dd , any measurement in progress (before store goes low) is stopped, the main counter is reset and the chip is held read y to initiate a new measurement as soon as hold goes low. the latches which hold the main co unter data are not updated, so the last complete measur ement is displayed. in unit counter mode when hold input is at v dd , the counter is not stopped or reset, but the display is fr ozen at that instantaneous value . when hold goes low the count continues from the new value in the new counter. reset input the reset input resets the mai n counter, stops any measurement in pro gress, and enables t he main counter latches, resulting in an all zero output. a capacitor to ground will prevent any han g-ups on power-up. measurement in progress this output is provided in lcm7216d. it stays low during measurements and goes hig h for intervals between measurements. it is provided f or system interfacing and can drive a low power schottky tt l or one ecl load if the ecl device is powered from the same supply as lcm7216d. decimal point position table 3 shows the decimal point position for different modes of lcm7216 operation. note that the d igit 1 is the least significa nt digit. table 3 is for 10mhz timebase frequency. overflow indication when overflow happens in any meas urement it will be indicated on the decimal point of the digit 8. a separate led indicator c an be used. figure 9 shows how to connect this indicator. overflow will be indicated on the decimal point output of digit 8. a separate led overflow indi cator can be connected as follows: time interval measurement when in the time interval mode and measuring a single event, the lcm7216b must first be pr imed prior to measuring the event of interest. this is done by first generating a negative going edge on channel a followed by a negative going edge on channel b to start the measurem ent interval. the inputs are then primed ready for the m easurement. posit ive going edges on a and b, before or after the priming, will be needed to rest ore the original condition. priming can be easily accomplished using the circuit in figure 10 (next page). device cathode anode icm7216b/d d8 decimal point a b c d f g e dp figure 9. segment identification and display font table 3. decimal point positions range frequency period frequency ratio time interval unit counter oscillator frequency 0.01s/1 cycle d2 d2 d1 d2 d1 d2 0.1s/10 cycle d3d3d2d3d1d3 1s/100 cycle d4 d4 d3 d4 d1 d4 10s/1k cycle d5 d5 d4 d5 d1 d5
icm7216b, icm7216d fn3166 rev.4.00 page 11 of 18 jan 7, 2004 following the priming procedure (when in single event or 1 cycle range) the device is ready to measure one (only) event. when timing repetitive signals, it is not necessary to prime the lcm7216b as the first alternating signal states automatically prime the device. see figure 1. during any time interval meas urement cycle, the lcm7216b require 200ms following b going low to update all internal logi c. a new measurement cycle will not take pl ace until completion of this internal update time. oscillator co nsiderations the oscillator is a high gain cmos inverter. an external resistor of 10m ? to 22m ? should be connecte d between the oscillator input and output to provide biasing. the oscillator is designed to work with a parallel resonant 10mhz quartz crystal with a static cap acitance of 22pf and a series resistance of less than 35 ? . for a specific crystal and load capacitance, the required g m can be calculated as follows: c o = crystal static capacitance r s = crystal series resistance c in = input capacitance c out = output capacitance ? = 2 ? f the required g m should not exceed 50% of the g m specified for the lcm7216 to insure reli able startup. the oscillator input and output pins eac h contribute about 5pf to c in and c out . for maximum stability of frequency, c in and c out should be approximately t wice the specified crystal static capacitance. in cases where non decade prescalers are used it may be desirable to use a crystal which is neither 10mhz or 1mhz. in that case both the multipl ex rate and time between measurements will be differ ent. the multiplex rate is for 10mhz mode and for the 1mhz mode. the time between measurements is in the 10mhz mode and in the 1mhz mode. the crystal and oscillator components should be located as close to the chip as practical t o minimize pickup from other signals. coupling from the external osclllator input to the osclllator output or input can cause undesirable shifts in oscillator frequency. display considerations the display is multipl exed at a 500hz rate with a digit time of 244 ? s. an interdigit blanking time of 6 ? s is used to prevent display ghosting (faint display of data from previous digit superimposed on the next digit ). leading zero blanking is provided, which blanks the left hand zeroes after decimal point or any non zero digits. digits t o the right of the decimal poin t are always displayed. the leading zero blanking will be disabled when the main counter overflows. the lcm7216b and lcm7 216d are designed to drive common cathode displays at peak cu rrent of 15ma/segment using displays with v f = 1.8v at 15ma. resistors can be added in series with the segment drivers to limit the display current in very efficient displays, if required. the typical performance curves show the digit and s egment currents as a function of output voltage. to get additional brightne ss out of the displays, v dd may be increased up to 6.0v. however, care should be taken to see that maximum power and curre nt ratings are not exceeded. the segment and digit outputs in lcm7216s are not directly compatible with either ttl or cmos logic when driving leds. therefore, level shifting with discrete transistors may be required to use these outputs as logic signals. accuracy in a universal counter crystal drift and quantization effects cause errors. in frequency, period and time interval modes, a signal derived from the oscilla tor is used in either the reference counter or main counter. therefore, in these modes an error in the oscil lator frequency will cause an identical error in the measurement. for instance, an oscillator temperature coefficient of will cause a measurement error of signal a signal b input a input b v dd n.o. 100k 1n914 v dd 150k 1 0.1 ? f 10k 10nf 11 1 2 2 v ss v ss v ss prime figure 10. priming circuit, signals a and b both high or low device type 1 cd4049b inverting buffer 2 cd4070b exclusive - or g m ? 2 c in c out r s 1 c o c l -------- + ?? ?? ?? 2 = where c l c in c out c in c out + -------------------------------- - ?? ?? ?? = ? ------------------ - = ? ------------------ - = ? f osc ------------------ - ? f osc ------------------ - ------------------ - ------------------ -
icm7216b, icm7216d fn3166 rev.4.00 page 12 of 18 jan 7, 2004 in addition, there is a quantization error inherent in any digi tal measurement of ? 1 count. clearly this e rror is reduced by displaying more digits. in the frequency mode the maximum accuracy is obtained with high frequency inputs and in period mode maximum accurac y is obtained with low frequency inputs (as can be seen in figure 11). in time interval measurements there can be an error of 1 count per interval. as a result ther e is the same inherent accuracy in all ranges as shown in figure 12. in frequency ratio measurement can be more accurately obtained by averaging over more cycles of input b as shown in figure 13. figure 11. maximum accuracy of frequency and period measurements due to limitations of quantization errors figure 12. maximum accuracy of time interval measurement due to limitations of quantization errors figure 13. maximum accuracy for frequency ratio measurement due to limitation of quantization errors frequency measure 0 2 4 8 11010 3 10 7 frequency (hz) maximum number of 6 0.01s significant digits 10 5 0.1s 10s 1s period measure f osc = 10mhz 1 cycle 10 cycles 10 3 cycles 10 2 cycles maximum time interval for 10 3 intervals maximum time interval for 10 2 intervals maximum time interval for 10 intervals 10 3 10 4 10 5 10 6 10 7 10 8 10 2 10 1 0 1 2 3 4 5 6 7 8 time interval ( ? s) maximum number of significant digits 1 cycle 10 cycles 10 3 cycles 10 2 cycles range 10 3 10 4 10 5 10 6 10 7 10 8 10 2 10 1 0 1 2 3 4 5 6 7 8 maximum number of significant digits f a /f b
icm7216b, icm7216d fn3166 rev.4.00 page 13 of 18 jan 7, 2004 test circuit typical applications the lcm7216 has been designed for use in a wide range of universal and frequency counter s. in many cases, prescalers wil l be required to reduce the in put frequencies to under 10mhz. because input a and input b ar e digital inputs, additional circuitry is often required for input buffering, amplification, hysteresis, and level shifting to obtain a good digital signal. the lcm7216b can be used as a minimum component complete universal counter as shown in figure 15. this circuit can use input frequencies up to 10mhz at input a and 2mhz at input b. if t he signal at input a h as a very low duty cycle it may be necessary to us e a 74ls121 monostable multivibrator or similar circuit to stretch the input pulse wid th to be able to guarantee that it is at least 50ns in duration. to measure frequencies up to 40mhz the circuit of figure 16 can be used. to obtain the correct measured value, it is necessary to divide the oscillator frequency by four as well as the input frequency. in doing this the time between measurements is also lengthened to 800ms and the display multiplex rate is decreased to 125hz. if the input frequency is prescale d by ten, then the oscillator can remain at 10mhz or 1mhz, b ut the decimal point must be moved one digit to the right. figure 17 shows a frequency counter with a ? 10 prescaler and an lcm7216a. since there is no external decimal point c ontrol with the lcm7216b, the decimal point may be controlled exter nally with additional drivers as shown in figure 17. alternatively, if separate anode s are available for the decimal points, they can be wired up to t he adjacent digit anodes. note that there can be one zero to the left of the decimal point since the internal leading zero blank ing cannot be changed. i n figure 18 additional logic has been added to count the input directly in period mode for maximum accuracy. in figures 17 and 18, input a comes from q c of the prescaler rather than q d to obtain an in put duty cycle of 40%. function 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 a b c d e f g dp input a 100pf input b 10k dp d1 d2 d3 d4 d8 d5 f p fr ti. u.c. o.f. reset led overflow indicator d8 d8 d7 d6 d5 d4 d3 d2 d1 d1 d2 d3 d4 .01/1 .1/10 1/100 10/1k 10k ? d1 d2 d3 d4 d5 d6 d7 d8 v dd icm7216a e g a d b c f v dd 10k ? v dd 10k ? 22m ? 10mhz crystal 39pf typ v dd display blank display test 1mhz ext test osc 39pf d4 d8 d2 d1 d5 ext osc input typical crystal specs: f = 10mhz parallel resonance c l = 22pf r s = <35 ? function range 8 8 4 6 8 hold generator function generator 1n914s figure 14. test circuit (icm7216a shown, others similar)
icm7216b, icm7216d fn3166 rev.4.00 page 14 of 18 jan 7, 2004 figure 15. 10mhz universal counter input a 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 a b c d e f g dp 10k ? d1 d1 d2 d3 d4 d8 d5 f p f. r . t. i . u.c. o.f. led overflow indicator d8 d8 d7 d6 d5 d4 d3 d2 d1 dp g e a d1 d2 d3 d4 d b c f v dd icm7216b d3 d2 d4 d5 d6 d7 d8 v dd v dd 22m ? 10mhz crystal 39pf typ display blank display test ext osc d4 d8 d1 ext osc input function hold input b enable 100k ? control switches sec cycles d1 0.01 1.0 d2 0.1 10.0 d3 1.0 100.0 d4 10.0 1k range 10k ? 10k ? segment drivers reset digit drivers common cathode led display 0.1 ? f 6 8 8 8 8 39pf v dd 4 3 100pf 1n914s
icm7216b, icm7216d fn3166 rev.4.00 page 15 of 18 jan 7, 2004 figure 16. 40mhz frequency counter 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 a b c d e f g dp d1 overflow indicator d8 d7 d6 d5 d4 d3 d2 d1 dp g e a d b c f icm7216d d3 d2 d4 d5 d6 d7 d8 v dd v dd 22m ? 2.5mhz crystal 39pf display test display off ext osc d1 d4 d8 ext osc input hold enable common cathode led display 8 3 1n914s led overflow indicator d1 d2 d3 d4 range reset a b c d e f g dp 39pf 100k ? input a 1 / 2 74ls112 1 / 2 74ls112 4 8 8 10k ? 100pf 10k ? 3k ? j3 1cl k2 c 15 v+ q5 q 6 k12 13 cl j11 c 14 p 10 p 4 q 7 q9 0.1 ? f v dd v dd d8
icm7216b, icm7216d fn3166 rev.4.00 page 16 of 18 jan 7, 2004 figure 17. 100mhz multifunction counter 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 a b c d e f g 100pf dp d1 d2 d8 reset led overflow indicator d8 d8 d7 d6 d5 d4 d3 d2 d1 d1 d2 d3 d4 10k ? d1 d2 d3 d4 d5 d6 d7 d8 v dd icm7216a e g a d b c f v dd 10k ? v dd 10k ? 22m ? 10mhz crystal 30pf typ v dd display test 39pf d7 range 8 8 8 hold v dd 3k ? d1 d2 d3 d4 dp 1k ? dp 40 ? v ss 1k ? 0.1 ? f f p f. r . 10k ? input b input a ck1 ck2 qa qc qa qc 74ls90 or 11c90 ck2 ck1 11c90 3k ? v dd 4 4 common anode led display 2n2222 1n914
icm7216b, icm7216d fn3166 rev.4.00 page 17 of 18 jan 7, 2004 figure 18. 100mhz frequency, 2mhz period counter 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 a b c d e f g 100pf dp d8 d8 d7 d6 d5 d4 d3 d2 d1 d1 d2 d3 d4 10k ? d1 d2 d3 d4 d5 d6 d7 d8 v dd icm7216a e g a d b c f v dd 100k ? v dd 22m ? 10mhz crystal 39pf typ v dd 39pf range 8 8 8 hold d1 d2 d3 d4 dp dp 40 ? v ss 1k ? 4 4 common anode led display 2n2222 cont cont reset 0.1 ? f 10k ? function switch open: freq. closed: period 3k ? 3k ? 11c90 ck1 ck2 qa oc 74ls00 v dd 10k ? v dd v dd 10k ? 10k ? 1k ? v ss 2n2222 1k ? 2n2222 10k ? d3 1 2 13 cd4016 d1 4 3 d8 5 v + led overflow indicator input a
fn3166 rev.4.00 page 18 of 18 jan 7, 2004 icm7216b, icm7216d intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description on ly. intersil may modify the circuit design an d/or specifications of products at any time without notice, provided that such modification does not, in intersil's sole judgment, affect the form, fit or function of the product. accordingly, the reader is cautioned to verify that datasheets are current before placing orders. information fu rnished by intersil is believed to be accu rate and reliable. however, no responsib ility is assumed by intersil or its subsidiaries for its use; nor for any infrin gements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com for additional products, see www.intersil.com/en/products.html ? copyright intersil americas llc 2001-2004. all rights reserved. all trademarks and registered trademarks are the property of their respective owners. dual-in-line plastic packages (pdip) notes: 1. controlling dimensions: inch. in case of conflict between eng lish and metric dimensions, the inch dimensions control. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. symbols are defined in the mo series symbol list in section 2.2 of publication no. 95. 4. dimensions a, a1 and l are m easured with the package seated i n jedec seating plane gauge gs - 3. 5. d, d1, and e1 dimensions do not include mold flash or protrus ions. mold flash or protrusions shal l not exceed 0.010 inch (0.25mm). 6. e and are measured with the leads constrained to be perpendic- ular to datum . 7. e b and e c are measured at the lead tips with the leads unconstrained. e c must be zero or greater. 8. b1 maximum dimensions do not i nclude dambar protrusions. damb ar protrusions shall not exceed 0.010 inch (0.25mm). 9. n is the maximum number of terminal positions. 10. corner leads (1, n, n/2 and n/2 + 1) for e8.3, e16.3, e18.3, e28.3, e42.6 will have a b1 dimension of 0.030 - 0.045 inch (0.76 - 1. 14mm). e a -c- c l e e a c e b e c -b- e1 index 12 3 n/2 n area seating base plane plane -c- d1 b1 b e d d1 a a2 l a1 -a- 0.010 (0.25) c a m bs e28.6 (jedec ms-011-ab issue b) 28 lead dual-in-line plastic package symbol inches millimeters notes min max min max a - 0.250 - 6.35 4 a1 0.015 - 0.39 - 4 a2 0.125 0.195 3.18 4.95 - b 0.014 0.022 0.356 0.558 - b1 0.030 0.070 0.77 1.77 8 c 0.008 0.015 0.204 0.381 - d 1.380 1.565 35.1 39.7 5 d1 0.005 - 0.13 - 5 e 0.600 0.625 15.24 15.87 6 e1 0.485 0.580 12.32 14.73 5 e 0.100 bsc 2.54 bsc - e a 0.600 bsc 15.24 bsc 6 e b - 0.700 - 17.78 7 l 0.115 0.200 2.93 5.08 4 n28 289 rev. 1 12/00

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